Factory Floor Notes | HDL Factory

2026-11-02 You Deserve Nice Circuit Diagrams: Blockpic Draws Your Netlist #FPGA #bazel #openxc7

“You deserve nice circuit diagrams!” Every digital design document needs pictures. A clean block diagram communicates dataflow, bus widths, and control hierarchy in seconds. Reading through hundreds of lines of RTL or …

2026-10-31 Linux on a Simulated Rocket Core, over Ethernet #FireSim #Linux #RISC-V

Linux 6.18 now boots on FireSim’s Rocket design on an Alinx AX7A200B board. The host reaches the board over an Ethernet cable, as in the last post. The whole run takes 4 min 36 s: 4 min 22 s to load the software, and 13 …

2026-10-30 filmil’s Auto Reload: a tab reloader with two permissions #Chrome #browser extension #security

filmil’s Auto Reload is a Chrome extension that reloads a tab every few seconds, minutes or hours, and can do nothing else. It asks for two permissions, shows no warning when you install it, and cannot read the pages it …

2026-10-29 UberDDR4 Under Bazel: An Open DDR4 Controller, Checked by One Command #FPGA #bazel #Vivado

UberDDR4 is an open-source DDR4 SDRAM controller and PHY for FPGAs, written by Angelo C. Jacobo. It connects a Wishbone master to DDR4 memory. It handles initialization, command timing, bank scheduling, refresh and PHY …

2026-10-28 A Rocket Core on the AX7A200B, over Ethernet #FireSim #Ethernet #FPGA

FireSim runs simulated RISC-V systems on an FPGA. Its design with one Rocket core, Berkeley’s 64-bit RISC-V processor, now runs on an Alinx AX7A200B board. The host reaches the board over an Ethernet cable instead of …

2026-10-28 FireSim Over Ethernet on the AX7A200B #FireSim #Ethernet #FPGA

FireSim’s GCD example now runs on an Alinx AX7A200B board, with the host connected over a plain Ethernet cable instead of PCIe. On the board, a TxHDL unit takes register reads and writes out of raw Ethernet frames and …

2026-10-28 Hardware Development with Bazel: the book is out #books #bazel #fpga

My book Hardware Development with Bazel: Authoring HDL Rules came out on 27 October 2026, in paperback and for Kindle. It has 334 pages. It teaches you to write Bazel rules for hardware: VHDL simulators, verification …

2026-10-27 An AXI bus in TxHDL: links, routers and bridges #AXI #FPGA #Rust

Complex designs in TxHDL communicate over AXI4 interfaces. The Vreteno RISC-V processor, the Razboj rasteriser, DDR3 memory controllers, Ethernet MACs, and HDMI video controllers all use AXI interconnects. This post …

2026-10-27 FireSim Under Bazel #bazel #FireSim #Chisel

FireSim is an open-source tool from UC Berkeley that runs a chip design, usually a RISC-V system written in Chisel, on an FPGA, so that it is simulated cycle by cycle, far faster than in software. FireSim 1.22.0 now …

2026-10-25 Fuchsia Internals, Vol. III: The Zircon Kernel #Fuchsia #Zircon #microkernel

Volume III of the Fuchsia Internals series examines Zircon, the microkernel at the foundation of Fuchsia. At 43 pages, this report is the longest in the series. Subsequent subsystems like graphics, drivers, storage, and …

2026-10-20 Bazelizing Third-Party FPGA Designs: Two Case Studies #FPGA #bazel #openxc7

Converting existing open-source FPGA projects to Bazel and rules_openxc7 makes hardware builds reproducible, eliminates machine-specific paths, and enables one-command bitstream generation without vendor licensing …

2026-10-17 Bazelizing a Custom RISC CPU with 4x4 Systolic Matrix Accelerator #FPGA #bazel #openxc7

Open-source digital signal processing and machine learning accelerators are frequently published as student or research projects. While the RTL architecture is often innovative, the surrounding build and test scaffolding …

2026-10-17 Bazelizing mmRISC-2: A Full RISC-V SoC with rules_openxc7 #FPGA #bazel #openxc7

Converting existing open-source FPGA projects to Bazel and rules_openxc7 transforms fragile, vendor-locked hardware build scripts into reproducible, sandboxed workflows. This case study examines our complete Bazelization …

2026-10-15 rules_fusesoc: FuseSoC Cores as Bazel Dependencies #bazel #FPGA #RISC-V

rules_fusesoc integrates FuseSoC, the FPGA core package manager, into hermetic Bazel builds. Users declare desired core libraries and IP dependencies in Bazel build files. The module resolves dependencies and exports …

2026-10-14 First Steps with rules_openxc7: A Beginner’s Guide #bazel #FPGA #openxc7

This tutorial teaches you how to build your first FPGA bitstream with Bazel and the open-source rules_openxc7 toolchain. You do not need any prior Bazel experience, and you do not need to install AMD Vivado or compile …

2026-10-08 Doom on a RISC-V core written in TxHDL #TxHDL #FPGA #RISC-V

Doom now runs on Vreteno, the RISC-V core written in TxHDL, on an Artix-7 FPGA board. The game draws into a framebuffer in DDR3 memory, the board shows it on HDMI, and the keys come over the serial line. This post shows …

2026-10-08 openxc7 or Vivado: Build Times and Results Measured #bazel #FPGA #openxc7

I built the same three designs with the open toolchain and with Vivado, through the same Bazel rules, and timed every build from cold and warm caches. Small designs build two to three times faster with the open tools. …

2026-10-06 Razboj: a minimal GPU in TxHDL #GPU #FPGA #Rust

Razboj is a minimal graphics rasteriser implemented in approximately one hundred lines of TxHDL. It reads a display list from memory and writes rendered pixels into a framebuffer over an AXI bus. TxHDL lowers the design …

2026-10-05 Linux boots to a shell on Vreteno #RISC-V #Linux #FPGA

Mainline Linux now boots to a shell on Vreteno, the RISC-V core written in TxHDL. It runs on the Alinx AX7A200B board, an Artix-7 FPGA with 1 GiB of DDR3 memory, at 100 MHz. The kernel runs in supervisor mode with …

2026-10-04 Thanklessly Maintaining Open Source Software: the book #books #open source #humor

Thanklessly Maintaining Open Source Software started as a fake O’Reilly book cover, and it is now an actual book on Amazon. It has 95 pages, a year in the life of one unlucky maintainer, and a price of exactly one …

2026-10-01 rules_openxc7: Open-Source 7-Series FPGA Toolchains in Bazel #bazel #FPGA #openxc7

rules_openxc7 brings open-source FPGA synthesis and place-and-route for AMD 7-series chips into Bazel. It drives Yosys, nextpnr-xilinx, Project X-Ray, and openFPGALoader through the same target interface as rules_vivado. …

2026-09-29 Vreteno: a RISC-V core written in TxHDL #RISC-V #FPGA #Rust

Vreteno is a 32-bit RISC-V processor core designed in TxHDL. TxHDL is a hardware description language implemented as a native Rust library. The core implements the RV32IMC instruction set architecture: the base integer …

2026-09-29 wdbcvt: Bundling Waveform Test Corpora and Daily Nightly Releases #EDA #Vivado #bazel

wdbcvt now publishes two new release archives with every build: a documentation bundle and a waveform corpus. The waveform archive packages the test suite’s .wdb files, ground-truth .fst conversions, and HDL source files …

2026-09-25 Fuchsia Internals, Vol. II: The Build System and Toolchains #Fuchsia #build systems #GN

Volume II of the Fuchsia Internals series examines the build system architecture and toolchain infrastructure. The primary complexity in Fuchsia builds stems from the multi-toolchain model. Under this design, the build …

2026-09-24 grlib: Gaisler’s GRLIB and the NOEL-V Core as a Bazel Module #bazel #FPGA #RISC-V

The grlib Bazel module packages GRLIB, Gaisler’s (Frontgrade’s) GPL VHDL IP library, so that the NOEL-V RV64 RISC-V core and the AMBA infrastructure around it can be consumed as ordinary Bazel dependencies. It is the …

2026-09-20 An icosahedron on HDMI, drawn by a TxHDL core #TxHDL #FPGA #RISC-V

tl;dr: A RISC-V core written in TxHDL draws a turning icosahedron on a monitor, with the TxHDL logo in the corner. Watch it at https://youtu.be/YbHtntvvydk. The whole thing, core, memory, video, Ethernet and a serial …

2026-09-12 Automated Tests on Simulation Output, with SQLite #EDA #VHDL #Verilog

This article demonstrates converting a VCD dump into an indexed SQLite database using go-vcd-parser, then using a query language to answer questions about the signals. A logic simulator answers questions about a digital …

2026-09-12 TxHDL: a hardware description language is just a Rust async runtime #Rust #FPGA #RISC-V

TxHDL is an open-source hardware description language embedded directly in Rust as an async runtime library, developed by Dragiša Janković and Filip Filmar (me). Instead of inventing a custom compiler and type checker, …

2026-09-04 wdbcvt: reading Vivado’s undocumented .wdb waveform files #EDA #Vivado #FPGA

wdbcvt is an open-source converter that reads Vivado’s .wdb waveform files and converts them to the open-source FST format. Vivado’s xsim simulator writes simulation waveforms to a proprietary binary format that external …

2026-09-03 rules_vivado: FPGA Synthesis and Place-and-Route in Bazel #bazel #FPGA #Vivado

rules_vivado drives the AMD/Xilinx Vivado FPGA toolchain from Bazel: compile, simulate, synthesize, place-and-route, generate a bitstream, and program the device, all as ordinary build actions instead of clicks in a GUI …

2026-08-30 My homelab is fully ephemeral #homelab #bazel #HER

In my homelab, no individual server is treated as irreplaceable. Every machine across the laboratory (build nodes, developer workstations, and continuous integration runners) is fully ephemeral: it can be terminated at …

2026-08-25 Fuchsia Internals, Vol. I: The Graphics and Display Pipeline #Fuchsia #graphics #Vulkan

Volume I of the Fuchsia Internals report series examines the graphics and display pipeline. Graphics serves as a comprehensive system application that exercises core kernel primitives simultaneously. Rather than using an …

2026-08-17 Bazel all the way down: how I build programmable hardware #bazel #FPGA #HER

This is a description of how I build programmable hardware. Everything that goes into Cocoapuffs (my RISC-V system-on-chip on an Artix-7 FPGA), including the RTL, firmware, simulations, synthesis, bitstream, and board …

2026-07-25 Fuchsia Internals: A New Report Series for Hardware Engineers #Fuchsia #Zircon #operating systems

I have written a series of technical reports on the internals of Fuchsia, Google’s capability-based microkernel operating system. The material addresses electrical, register-transfer level (RTL), and FPGA engineers …

2026-07-23 The FPGA Hardware Interview: A Topic Guide with Questions and Exercises #FPGA #interviews #VHDL

Technical interviews for FPGA and digital design engineering positions draw from established digital design principles. Candidates often encounter difficulty communicating solutions under strict time constraints. To …

2026-07-19 Booting Fuchsia’s Zircon on a homebrew RISC-V SoC, on an Artix-7 FPGA #FPGA #RISC-V #Zircon

Fuchsia’s Zircon kernel now boots on Cocoapuffs, my homebrew RISC-V system-on-chip on an AMD Artix-7 FPGA. As far as I know, this is the first Fuchsia boot on programmable hardware. Below you will find the boot video and …

2026-05-28 Announcing bazel_local_nix 0.1.0 #bazel #nix #release

I’m excited to announce the release of bazel_local_nix 0.1.0! bazel_local_nix provides Bazel rules that make Nix packages available inside a Bazel workspace without a host-level Nix installation and without nix-portable. …

2026-04-19 Respin: upspin revival #bazel #go #upspin

tl;dr: I revived the upspin project source code. See it at https://github.com/filmil/upspin, and https://github.com/filmil/upspin-gdrive. Since April, it has also gained post-quantum encryption, streaming of large …

2026-04-18 Synod: Paxos agent #bazel #go #SQLite

Synod is a distributed Paxos coordination agent implemented in Go. It manages a highly available, synchronized Key-Value store across a network of peers using the Paxos consensus algorithm. It allows multiple dynamically …

2026-04-11 mkill: a memory watchcat #bazel #go #GCP

mkill is a Go program that continuously monitors memory usage of the programs owned by the current user. It kills the program with the sharpest rise in memory utilization when the overall system memory occupancy goes …

2026-02-01 Inventory of programmable hardware tooling #bazel #FPGA #Vivado

A link page of interesting libraries and utilities I found. Libraries, utilities, etc. https://registry.bazel.build/modules/rules_verilator https://github.com/lromor/fpga-assembler …

2026-01-03 fshlib: shell library #bazel #bash #shell

fshlib fshlib is a simple shell library for logging. It provides a set of functions to log messages with different severity levels. Github repo: https://github.com/filmil/fshlib Usage To use the library, source the …

2025-12-20 note to self: do not remove .bazelversion #bazel

note to self: do not remove .bazelversion from projects The other day, I was pondering whether to keep setting particular bazel version in projects. I even removed some, to see what would become of it. Since I use the …

2025-11-22 rules_shar: bazel rules for creating self-extracting archives (shars) #bazel #bazel modules #psa

This repository provides Bazel rules for creating self-extracting archives (“shar"s) out of shell binaries. See section “what is this” below for details. Details at: https://github.com/filmil/rules_shar Usage To use the …

2025-10-29 Hermetic, Ephemeral, Reproducible Builds: Take Three (3) #bazel #bazel modules #psa

Bazel rules to support a debian rootfs The idea of this repository is to provide a hermetic, ephemeral and reproducible repository of prebuilt binaries, which can then be brought into bazel builds to remove the …

2025-10-15 Hermetic, Ephemeral, Reproducible Builds: Take Three (2) #bazel #bazel modules #psa

This is another piece of news in my quest for hermetic, ephemeral, and reproducible builds (“HER”). If you read my articles in the past months or so, you may have noticed that I am looking for good ways of creating …

2025-10-07 Bazel knowledge sources #bazel

This is a collection of links to interesting articles and knowledge sources about the Bazel build system that I found. I’m motivated to do this after spending considerable time developing a thing that already existed. …

2025-10-06 Hermetic, Ephemeral, Reproducible Builds: Take Three (1) #bazel #bazel modules #psa

This is another piece of news in my quest for hermetic, ephemeral, and reproducible builds (“HER”). If you read my articles in the past months or so, you may have noticed that I am looking for good ways of creating …

2025-09-29 Getting ready for the brave new Bazel Modules world #bazel #bazel modules #psa

Update 2025-10-19: I made a searchable index of modules available from my registry at https://www.hdlfactory.com/bazel-registry. As Bazel 9.0 promises to disable the old dependency management approaches based on …

2025-09-21 lit2md: a literate program converter from code to Markdown #Markdown #Literate Programming #bazel

lit2md: a literate program converter from code to Markdown lit2md is a simplistic literate programming (LP) converter. See at: https://github.com/filmil/lit2md It takes a source code file annotated with special …

2025-09-01 Writing XDC Clock Constraints for Vivado #FPGA #Vivado #EDA

Writing XDC Clock Constraints for Vivado This guide explains how to properly constrain a digital design with multiple clocks in an XDC (Xilinx Design Constraints) file, specifically for use in Vivado batch mode. We’ll …

2025-08-01 Decentralized Downloads for Bazel: Introducing bazel_rules_bt #bazel #bazel modules

Decentralized Downloads for Bazel: Introducing bazel_rules_bt In the world of reproducible builds and efficient dependency management, Bazel stands out as a powerful tool. However, fetching large or uncommon dependencies …

2025-07-14 Mastering Resolved Signals in VHDL: A Comprehensive Guide for Digital Design #EDA #VHDL #FPGA

I asked Gemini to teach me about the VHDL resolved signals. What you read below is the result. Mastering Resolved Signals in VHDL: A Comprehensive Guide for Digital Design 1. Introduction to Signals in VHDL The …

2025-07-07 How to shoot yourself in the foot with inout signals #EDA #VHDL #FPGA

How to shoot yourself in the foot with inout signals They say that no good deed goes unpunished. Here’s an example of a footgun in VHDL which stems from in my view an eminently reasonable desire to keep the entity …

2025-06-29 VHDL IEEE Libraries and Numeric Type Conversion: A Definitive Reference #EDA #VHDL #FPGA

I asked Gemini to teach me the VHDL type conversions. What you read below is the result. An annoying generated podcast will be available for a while. VHDL IEEE Libraries and Numeric Type Conversions: A Definitive …

2025-06-19 Packaging AMD Xilinx Vivado ML Standard edition 2025.1 in a Docker container #Xilinx #FPGA #Docker

I updated the repository https://github.com/filmil/vivado-docker/ with the changes required to package Vivado 2025.1. As of this writing, version 2025.1 is the last published version. I hope that the updated version will …

2025-04-11 rules_nixpkgs use #bazel #nix #HER

rules_nixpkgs use This is a run-down of tips and tricks for the use of rules_nixpkgs, a rule set for bringing in nix packages for use in bazel. I got involved with the use of rules_nixpkgs as a result of my work on …

2025-02-11 Bazel rules for “build-in-docker” (or “bid”) #bazel #docker #bazel modules

Bid allows you to create a build rule that runs a single bazel build action inside a Docker container. And if you can run a single action, you can run more if you so choose. This helps you if you must use software which …

2025-02-04 Typeset your own ebooks easily with bazel-ebook #bazel #markdown #bazel modules

Other formats: Original content is at: https://github.com/filmil/bazel-ebook The rendered HTML edition at: https://hdlfactory.com/bazel_ebook_html/ Introduction This repository is a set of bazel build rules that allow …

2024-11-16 Using glbl.v module in a Verilog simulation in Vivado #FPGA #Vivado #Xilinx

A quick note about correct use of glbl.v in a Verilog simulation in Vivado. This note is way less confusing than any notes you may find elsewhere on the Internet. glbl.v is a small collection of “global” signals that are …

2024-10-26 go-vcd-parser: a tested VCD parser and toolkit in Go #EDA #Verilog #VHDL

go-vcd-parser reads Value Change Dump (VCD) files, the waveform format that simulators such as Verilator, Icarus Verilog and nvc write. The format is defined in IEEE 1800. The parser handles the 4-value format and the …

2024-10-22 GNOME tips and tricks #GNOME #Tricks

Reusing the general approach from this post gives a way for setting Shift_L+Shift_R as layout change: $ gsettings set org.gnome.desktop.wm.keybindings switch-input-source "['<Shift>Shift_L']" $ gsettings set …

2024-10-07 How to use $readmemh correctly #FPGA #Verilog

What? $readmemh is a Verilog directive that allows you to initialize an array. It works differently in simulation compared to synthesis. In simulation, this directive behaves as a “read file into array”. In synthesis, …

2024-10-05 From zero to RISC-V in hardware, in 6 minutes #FPGA #bazel #Xilinx

From zero to RISC-V in hardware, in 6 minutes Program your FPGA with a one-liner command. It’s a kind of magic. This is a project in sustainable FPGA development that I have been working on. It ties together several …

2024-09-14 nix requires ranlib #bazel #nix

Be forewarned: HER builds with nix require a functional ranlib This is something seldom known, and a very sharp corner to cut yourself on. But you really want to know if you are using nix. I lost an entire day trying to …

2024-09-03 bazel rules for GHDL #bazel #VHDL #EDA

bazel rules for GHDL I present to you https://github.com/filmil/bazel_rules_ghdl: a set of bazel rules for converting VHDL into Verilog. This for example allows running VHDL code in a Verilator simulation. Commercial …

2024-08-31 bazel rules for a riscv64 bare metal rust compiler #Rust #bazel #RISC-V

bazel rules for a riscv64 bare metal rust compiler This article assumes that you have bazel installed via the bazelisk method. This is the latest example in my repository at: https://github.com/filmil/bazel-experiments …

2024-08-24 bazel installation via the bazelisk method #bazel

bazel installation via the bazelisk method Here is how I install bazel. I use this installation method on all of my machines. I do not think it is practical to go about this any other way. It is implied in all of my …

2024-08-17 bazel rules for a riscv64 bare metal GCC compiler #gcc #bazel #RISC-V

bazel rules for a riscv64 bare metal GCC compiler The repository https://github.com/filmil/bazel_rules_gcc_riscv64_baremetal contains bazel rules that can be used for a hermetic bare metal GCC cross-compiler for a 64-bit …

2024-08-12 lazygit tips and tricks #lazygit

lazygit tips and tricks These are some tips and tricks for lazygit that I keep forgetting how to do. Split a commit into multiple commits Based on the discussion here. Open lazygit 4 to move to the commits panel Enter …

2024-07-08 Remote programming of an AMD (fka Xilinx) Artix-7 device #FPGA #Vivado #Xilinx

Summary Here is how you can set up a hardware server (hw_server) in AMD Vivado 2023.2. Once you do this, that you can move your workbench to a virtual machine in your cloud of choice - mine is GCP - but program a device …

2024-05-25 PSA: Google Nest Router can serve as an Access Point #psa

Google Nest Router (2nd Generation) can serve as an access point I accidentally bought the Google Nest 2nd Generation Router when I needed an Access Point. It turns out that the Router can act as an Access Point and join …

2024-05-01 Hermetic, ephemeral, reproducible builds (‘her’) #bazel #HER

Summary This short note defines the notions of hermetic, ephemeral and reproducible software build, as used in my writing. I call this “her” for short. Hermetic A build is said to be hermetic, if each build step only has …

2024-04-27 Why do I bother with bazel? #bazel

Summary I bother with bazel. Here is why. Background Bazel is a build system. Originally created at Google for internal purposes, then eventually open sourced. Since then, it has not been universally accepted. You can …

2024-04-20 Nix+Bazel = ❤️ #bazel #nix #bazel modules

You, too, can have a fully hermetic, reproducible, and ephemeral bazel build. If you are in a hurry, fast forward to https://github.com/filmil/bazel_local_nix Intro While looking for non-invasive and reproducible ways to …

2024-02-15 docker tips and tricks #docker

Docker tips and tricks Save an image to an archive docker save imagename | gzip > myimage.tar.gz Load image to an archive docker load < myimage.tar.gz

2024-02-05 bazel does not like FIFOs #bazel

Bazel does not like FIFOs Perhaps obvious in retrospect, but it is not possible for a bazel build artifact to generate a named pipe in the filesystem. The after-step checks will object if an output directory contains at …

2024-01-06 Unix domain sockets in go #go #unix

After a lengthy search I found the below article that explains the use of Unix domain sockets in go: https://johnrefior.com/gobits/read/go-introduction-to-unix-socket-communication

2024-01-01 Running docker containers in Synology NAS #Docker #Synology #NAS

If this advice helped you, let me know. How to run docker containers under Synology NAS, easily and with custom settings Prompted by a recent need to run a local Jupyter instance using the Jupyter Docker Stacks. The …

2023-12-25 TIM-011 video playlist #TIM-011

TIM-011 video playlist TIM-011 was an 8-bit teaching computer that was ostensibly developed by IMP in what is now Serbia. Here is a public collection of videos related to the TIM-011 computer. Most of the videos, and …

2023-12-24 TIM-011 gets a unit test library #TIM-011 #bazel

TIM-011 was an 8-bit teaching computer that was ostensibly developed by IMP in what is now Serbia. It is hard to develop for any machine without a way to test quickly whether your work results in something usable. Since …

2023-12-17 bazoekt: easy code indexing and search for your Bazel projects #bazel

Update 2026-04-17: Bazoekt has been modernized and revived. Sourcegraph has taken over maintenance of zoekt, but what they actually did was disable the old repo and dismantle the zoekt infrastructure, so it couldn’t be …

2023-12-14 bazel: excavating an unknown file from a foreign_cc rule #bazel

Excavating an unknown file from a foreign_cc rule I discovered this trick recently, while trying (and mostly failing) to build a library. I discovered that it is possible to excavate an arbitrary file from the resulting …

2023-12-13 TIM-011 gets a C runtime library #TIM-011 #bazel

TIM-011 gets a C runtime library TIM-011 was an 8-bit teaching computer that was ostensibly developed by IMP in what is now Serbia. Now that https://github.com/filmil/tim011-tools/issues/3 has been fixed, the TIM-011 …

2023-12-03 TIM-011 computer - how we did things back then #TIM-011 #bazel

I was a bit hard pressed to find all the proper work attribution. Please let me know if you have data to contribute. TIM-011 TIM-011 was an 8-bit teaching computer that was ostensibly developed by IMP in what is now …

2023-11-20 Packaging AMD Xilinx Vivado ML Standard edition in a Docker container #Xilinx #FPGA #Docker

A while back I wanted to make a hermetic environment for repeatably running Docker tooling. The results are here: https://github.com/filmil/vivado-docker/ At this time, it’s only able to run the GUI version of the tool. …

2023-09-18 Neovim tips and tricks #neovim

From VimScript into Lua This is my cheat sheet for migrating VimScript into Lua. Things I often forget. There are places to learn about Lua use in Neovim . But, for some reason, I could not find side-by-side examples of …

2023-08-05 git tips and tricks #git

Often needed little bits of git knowledge that I tend to forget. Check out the contents of a GitHub PR From: https://devopscube.com/checkout-git-pull-request/ git fetch origin pull/15/head:test-branch This will fetch the …

2023-07-30 bazel tips and tricks #bazel

Often needed little bits of bazel knowledge that I tend to forget. Module extensions Reminder about module extensions. # Also instead of `http.bzl`, `git.bzl` etc. http_file = …

2023-07-25 Build a python web app in bazel #bazel #python

Here is an example python Flask app built with Bazel. See README.md for instructions. Running the app will start a local dev server for Flask and you should be able to direct your browser at it and see the result. Based …

2023-06-30 Tesla ownership experiences so far #EV #Tesla

We recently became Tesla owners, as our old car unexpectedly gave out. We were expecting to get at least 1 more year out of it. But it was not meant to be. Now that we’re obnoxious Tesla owners, it is only fair that I …

2023-06-23 Including arbitrary files into cc_library rule in bazel #bazel

Update 2023-08-17: This is now a feature in bazel, see https://github.com/bazelbuild/bazel/issues/18766 for details. It is available starting bazel version 6.3.0. Use additional_compiler_input parameter to cc_library …

2023-06-13 How to use the make rule from rules_foreign_cc repository for bazel #bazel #bazel modules

Summary The bazel build system has rules available to build C or C++ code from external repositories that use other more “conventional” build tools. By this I mean the usual suspects: GNU autotools, GNU make and cmake. …