Verilog

• 2026-09-04 wdbcvt: reading Vivado’s undocumented .wdb waveform files #EDA#Vivado#FPGA

  As far as I’m aware, this is the first open source Vivado WDB to open-source FST converter in existence. Vivado’s xsim writes its waveforms to a .wdb file that normally only Vivado knows how to read. Well, now, wdbcvt …

• 2024-10-26 go-vcd-parser: a tested VCD parser and toolkit in Go #EDA#Verilog#VHDL

  go-vcd-parser reads Value Change Dump (VCD) files, the waveform format that simulators such as Verilator, Icarus Verilog and nvc write. The format is defined in IEEE 1800. The parser handles the 4-value format and the …

• 2024-10-07 How to use $readmemh correctly #FPGA#Verilog

  What? $readmemh is a Verilog directive that allows you to initialize an array. It works differently in simulation compared to synthesis. In simulation, this directive behaves as a “read file into array”. In synthesis, …